J. S. Lundh, Hannah N. Masten, K. Sasaki, A. Jacobs, Zhe Cheng, J. Spencer, Lei Chen, J. Gallagher, A. Koehler, K. Konishi, S. Graham, A. Kuramata, K. Hobart, M. Tadjer
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引用次数: 0
Abstract
While the ultrawide bandgap (Eg~4.9 e V) and high critical electric field (Ec~8 MV /cm) of ß-Ga2O3 [1] has promising implications for power electronics, the very low bulk thermal conductivity (0.11-0.27 W/cm.K [2]) presents a formidable thermal challenge. For lateral devices, heat is typically generated within tens of nanometers of the semiconductor surface. Therefore, a pathway for efficient heat dissipation through the surface could substantially improve device-level thermal performance. In this work, we report the first experimental demonstration of top-side device-level thermal management of Ga2O3-based transistors by capping an (Al0.21Ga0.79)2O3/Ga2O3 heterostructure field-effect transistor (HFET) with a ~400 nm thick sputter-deposited aluminum nitride (AlN) heat spreading layer. Compared to a reference HFET, we observed a ~30% reduction in device-level thermal resistance at the gate electrode.