A Background Mismatch Calibration For Capacitive Digitial-To-Analog Converters RTERS

Abstract

This paper presents a background mismatch-calibration method for a capacitive digital-to-analog-converter (CDAC). The linearity of a CDAC depends on the mismatch of the capacitors. In a CDAC, every bit activates the corresponding capacitor-bank (CB). Therefore, there are the same number of CBs as the number of bits. In reality, it is very important to match the current CB with the rest least-significant CBs. The mismatch values of individual capacitors in CBs from the unit sized-capacitor are not important since the voltage division is defined by capacitor banks as whole. If perfect matching among CBs are provided then the correct analog voltage output is defined by the ratio between the particular CB and total capacitance-value of CDAC considering the most-significant CBs tuned earlier. The method used in this paper is based on eliminating the mismatch between CBs rather than tuning each individual elements of CDAC. Adjusting each capacitor bank is much simpler and powerful technique to eliminate nonlinearities