An efficient approach for reversible realization of 1:4 demultiplexer circuit

Abstract

Demultiplexer circuits are considered as one of the most significant combinational digital component of computing systems. Demultiplexers are widely used for signal distribution. This paper presents an efficient approach to design a 1:4 demultiplexer circuit using reversible logic approach. Reversible approach is one of the emerging digital circuit designing technology now-a-days. This approach aims for lossless digital devices with improved performance and efficiency. The proposed demultiplexer circuit optimizes some selected performance parameters as compared to existing designs. The proposed circuit may be utilized for further designing of various other low loss digital systems.