Improving manufacturing performance at the Rochester Institute of Technology integrated circuit factory

Abstract

The Integrated circuit Factory at RIT has realized much success in improving manufacturing performance and advancement toward six-sigma process capability goals. The Factory is comprised of approximately 20 graduate and undergraduate students in microelectronic engineering. Customers include a small number of companies and other universities in addition to faculty members and graduate students in electrical, microelectronic, and computer engineering at RIT. Products mostly consist of analog and digital CMOS integrated circuits fabricated in a P-well CMOS process. The factory maintains a work-in-progress (WIP) level of around 5 lots (50 wafers) and has a throughput of approximately 50 lots per year, with an average lot cycle time of approximately 1 month. The university IC facility is very dynamic in that the operators, equipment, and processes are constantly changing, The process capability baseline has been obtained from data collected for the past several years of student-run factory operation. A methodology to improve the quality of the student-run factory was implemented and is described in detail, The baseline study found that none of processes had process capability (Cpk) greater than one (3 sigma). However, manufacturing performance and product quality has been greatly improved by implementing the following set of tools: computer integrated manufacturing (CIM); total quality management (TQM) methodology; statistical process control (SPC); and "six-sigma" process capability analysis. Today several processes show Cpk>1. The student run integrated circuit factory at RIT has made significant progress toward achieving six-sigma manufacturing goals.