{"title":"NoCVision: A Network-on-Chip Dynamic Visualization Solution","authors":"V. Gogte, Doowon Lee, Ritesh Parikh, V. Bertacco","doi":"10.1145/2835512.2835518","DOIUrl":null,"url":null,"abstract":"Networks-on-chip (NoCs) are the communication infrastructure of choice for integrating the many components of modern silicon systems, deployed anywhere from systems-on-chip, to chip multi-processors, and to heterogeneous systems. The growing design complexity of these systems, coupled with shrinking times-to-market, requires efficient analysis of complex applications mapped onto the network in a short span of time. In this work, we propose NoCVision, a novel platform for the analysis of NoC characteristics and traffic flows. NoCVision enables design-space exploration, performance tuning, and validation of the NoC subsystem. It allows to consolidate and summarize the network's simulation data and visualize it through intuitive diagrams and plots, either in a static form or animating it to depict changes occurring over time during an application's execution. To showcase the features and benefits of NoCVision, we present several case studies developed on a 64-node CMP organized in a 8x8 mesh NoC and running multi-programmed workloads.","PeriodicalId":424680,"journal":{"name":"Proceedings of the 8th International Workshop on Network on Chip Architectures","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 8th International Workshop on Network on Chip Architectures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2835512.2835518","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Networks-on-chip (NoCs) are the communication infrastructure of choice for integrating the many components of modern silicon systems, deployed anywhere from systems-on-chip, to chip multi-processors, and to heterogeneous systems. The growing design complexity of these systems, coupled with shrinking times-to-market, requires efficient analysis of complex applications mapped onto the network in a short span of time. In this work, we propose NoCVision, a novel platform for the analysis of NoC characteristics and traffic flows. NoCVision enables design-space exploration, performance tuning, and validation of the NoC subsystem. It allows to consolidate and summarize the network's simulation data and visualize it through intuitive diagrams and plots, either in a static form or animating it to depict changes occurring over time during an application's execution. To showcase the features and benefits of NoCVision, we present several case studies developed on a 64-node CMP organized in a 8x8 mesh NoC and running multi-programmed workloads.