Eutectic solder bump process for ULSI flip chip technology

Abstract

A novel eutectic solder bump process, which allows ULSI chips area array pad layout, has been developed. Straight side wall bumps as plated using a new negative-type photoresist and eutectic solder electroplating provide several advantages over conventional mushroom bumps. The novel developed process gives the bump height uniformity as reflowed of less than 10% within the wafer. Composition measurements using ICP spectrometry have been performed to investigate the bump height dependence on solder compositions and the metal content dependence of a plating solution on the solder composition uniformity within the wafer. Experimental results show that the plating solution with the total metal concentration of more than 60 g/l gives a uniformity at eutectic point of less than 3% within wafer. In addition, we have confirmed that the use of a eutectic solder disk anode keeps the composition of a plating solution constant for a long term product run.