{"title":"Control unit implementation for a reduced complexity reconfigurable data acquisition architecture","authors":"H. Le, A. Zayegh, J. Singh","doi":"10.1109/APCCAS.2004.1413037","DOIUrl":null,"url":null,"abstract":"A control unit for a reconfigurable data acquisition (DAQ) architecture has been presented. The reconfigurable DAQ system is employed in a digital relay for power system distance protection. It can detect and adjust its sampling speed depending on the occurrence of a fault in the network. Results indicate that a 98% reduction of average data throughput is achieved. 87% reduction of power consumption is obtained and the total sampled data is reduced by 98% when the reconfigurable algorithm is applied. This significantly reduces the system need for data storage, and hence correspondingly reduces the system complexity, and also enables an increase of the system detection speed and accuracy.","PeriodicalId":426683,"journal":{"name":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2004.1413037","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A control unit for a reconfigurable data acquisition (DAQ) architecture has been presented. The reconfigurable DAQ system is employed in a digital relay for power system distance protection. It can detect and adjust its sampling speed depending on the occurrence of a fault in the network. Results indicate that a 98% reduction of average data throughput is achieved. 87% reduction of power consumption is obtained and the total sampled data is reduced by 98% when the reconfigurable algorithm is applied. This significantly reduces the system need for data storage, and hence correspondingly reduces the system complexity, and also enables an increase of the system detection speed and accuracy.