A. Ueda, Seungmin Jung, T. Mizutani, Ashok Kumar, T. Saraya, T. Hiramoto
{"title":"Ultra-low voltage (0.1V) operation of Vth self-adjusting MOSFET and SRAM cell","authors":"A. Ueda, Seungmin Jung, T. Mizutani, Ashok Kumar, T. Saraya, T. Hiramoto","doi":"10.1109/VLSIT.2014.6894416","DOIUrl":null,"url":null,"abstract":"A V<sub>th</sub> self-adjusting MOSFET consisting of floating gate is proposed and the ultra-low voltage operation of the V<sub>th</sub> self-adjustment and SRAM cell at as low as 0.1V is successfully demonstrated. In this device, V<sub>th</sub> automatically decreases at on-state and increases at off-state, resulting in high I<sub>on</sub>/I<sub>off</sub> ratio as well as stable SRAM operation at low V<sub>dd</sub>. The minimum operation voltage at 0.1V is experimentally demonstrated in 6T SRAM cell with V<sub>th</sub> self-adjusting nFETs and pFETs.","PeriodicalId":105807,"journal":{"name":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2014.6894416","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A Vth self-adjusting MOSFET consisting of floating gate is proposed and the ultra-low voltage operation of the Vth self-adjustment and SRAM cell at as low as 0.1V is successfully demonstrated. In this device, Vth automatically decreases at on-state and increases at off-state, resulting in high Ion/Ioff ratio as well as stable SRAM operation at low Vdd. The minimum operation voltage at 0.1V is experimentally demonstrated in 6T SRAM cell with Vth self-adjusting nFETs and pFETs.