Logic testing with test-per-clock pattern loading and improved diagnostic abilities

Abstract

This paper describes a test response compaction system that preserves diagnostic information and enables performing a test-per-clock offline testing. The test response compaction system is based on a chain of T flip-flops. The T flip-flop signature chain can preserve the information about the position of the first occurrence of the erroneous test response and the information about the clock cycle when the erroneous test response occurred. This information can be used for diagnostic purposes. The paper discusses the possible benefits and limitations of the proposed test pattern compaction scheme. The influence of multiple errors on detection and localization capability of the compaction system and hardware overhead is discussed in the paper as well.