{"title":"A 1V 14mW-per-Channel Flexible-IF CMOS Analog-Baseband IC for 802.11a/b/g Receivers","authors":"Pui-in Mak, S. U, R. Martins","doi":"10.1109/VLSIC.2006.1705396","DOIUrl":null,"url":null,"abstract":"Presented is a low-voltage low-power analog-baseband IC featuring a two-step channel-selection architecture for a flexible-IF reception of 802.11a/b/g. In circuits, it integrates innovatively series-switching mixers for a precise I/Q demodulation; an inside-opamp dc-offset cancellation for area savings and switchability, a switched-current-resistor programmable-gain amplifier for a transient-free constant-bandwidth gain adjustment. Fabricated in a 0.35mum CMOS process, each channel consumes 14mW from 1V, while measuring <1mus gain-switched transient, 32/90dB stopband rejection at 20/40MHz and 15.2dBm IIP3","PeriodicalId":366835,"journal":{"name":"2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2006.1705396","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Presented is a low-voltage low-power analog-baseband IC featuring a two-step channel-selection architecture for a flexible-IF reception of 802.11a/b/g. In circuits, it integrates innovatively series-switching mixers for a precise I/Q demodulation; an inside-opamp dc-offset cancellation for area savings and switchability, a switched-current-resistor programmable-gain amplifier for a transient-free constant-bandwidth gain adjustment. Fabricated in a 0.35mum CMOS process, each channel consumes 14mW from 1V, while measuring <1mus gain-switched transient, 32/90dB stopband rejection at 20/40MHz and 15.2dBm IIP3
提出了一种低压低功耗模拟基带IC,采用两步通道选择架构,用于802.11a/b/g的灵活中频接收。在电路中,它集成了创新的串行开关混频器,用于精确的I/Q解调;一个内运放直流偏置消除,以节省面积和可切换性,一个开关电流电阻可编程增益放大器,用于无瞬变恒定带宽增益调节。在0.35 μ m CMOS工艺中制造,每个通道从1V消耗14mW,同时测量<1mus增益切换瞬态,32/90dB阻带抑制,20/40MHz和15.2dBm IIP3