Study of nano-regime strained MOSFETs with temperature effects

Abstract

Strained engineering in nano process technology is considered to be a promising enhancements on the electric characteristics of MOSFET devices. Both tensile and compressive strains are applied to NMOS and PMOS individually using silicon nitride as contact etching stop layer (CESL). As appeared in this study, the electrical characteristics are to be compared with or without strain on 10µm/10µm (channel length/ width) at various temperatures, and more benefits of compressive CESL and tensile CESL for NMOS and PMOS, respectively, are seen. One thus goes on to check with the trans-conductance (gm) and the leakage current. The data that were shown assure us the next-generation promising devices.