I. Diaz, B. Sathyanarayanan, A. Malek, F. Foroughi, J. Rodrigues
{"title":"Highly scalable implementation of a robust MMSE channel estimator for OFDM multi-standard environment","authors":"I. Diaz, B. Sathyanarayanan, A. Malek, F. Foroughi, J. Rodrigues","doi":"10.1109/SiPS.2011.6088995","DOIUrl":null,"url":null,"abstract":"In this paper a VLSI implementation of a highly scalable MMSE (Minimum Mean Square Estimator) is presented with the ultimate goal of demonstrating the potential of MMSE as enabler for multi-standard channel estimation. By selecting an appropriate implementation, a complexity reduction of 98% is achieved when compared to Time-Domain Maximum Likelihood Estimation (TDMLE), whereas low power consumption is accomplished by implementing a low-power-mode. The architecture is capable of performing Least Square (LS) estimation and MMSE compliant with 3GPP LTE (Long Term Evolution), IEEE 802.11n (WLAN), and DVB-H (Digital Video Broadcast for Handheld Devices), The estimator is synthesized using a 65nm low-leakage high-threshold standard-cell CMOS library. The design occupies an area of 0.169 mm2, is capable of running upto 250 MHz, providing a throughput of 78M estimates/second. Simulations under a typical LTE reception show that the implementation dissipates 4.9μW per sample.","PeriodicalId":368538,"journal":{"name":"2011 IEEE Workshop on Signal Processing Systems (SiPS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Workshop on Signal Processing Systems (SiPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SiPS.2011.6088995","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper a VLSI implementation of a highly scalable MMSE (Minimum Mean Square Estimator) is presented with the ultimate goal of demonstrating the potential of MMSE as enabler for multi-standard channel estimation. By selecting an appropriate implementation, a complexity reduction of 98% is achieved when compared to Time-Domain Maximum Likelihood Estimation (TDMLE), whereas low power consumption is accomplished by implementing a low-power-mode. The architecture is capable of performing Least Square (LS) estimation and MMSE compliant with 3GPP LTE (Long Term Evolution), IEEE 802.11n (WLAN), and DVB-H (Digital Video Broadcast for Handheld Devices), The estimator is synthesized using a 65nm low-leakage high-threshold standard-cell CMOS library. The design occupies an area of 0.169 mm2, is capable of running upto 250 MHz, providing a throughput of 78M estimates/second. Simulations under a typical LTE reception show that the implementation dissipates 4.9μW per sample.