Process Algebra Based SoC Test Scheduling for Test Time Minimization

Abstract

Test scheduling is crucially important for optimal SoC test automation to allocate the limited available test resources. The minimized test application time can be achieved by test pipelining. However the test power consumption incurred during test procedure must be controlled in order not to offend the allowed maximal power dissipation thus avoiding damaging the system under test. Process algebra is the adept to deal with concurrent behaviors, based on this, the test scheduling scheme for SoC cores concurrent test is outlined by mapping the parallel test actions into concurrent processes. The algorithm for SoC test scheduling based on process algebra (TS-PA) under multiple constraints (test power dissipation, test resources and test priorities) is given. Experimental results prove the effectiveness of the proposed method.