Novel addressing scheme for passive antiferroelectric liquid crystal displays

Abstract

In this work, the use of antiferroelectric liquid crystals for high-end passive displays has been explored. Antiferroelectric gray levels arise from a double symmetric hysteresis loop that can be stabilized by a constant holding voltage. This driving scheme is passive multiplexing compatible, but limitations appear when the multiplexing rate increases. We have developed new waveforms and driving schemes for high multiplexing level at video rate. The problem of accumulated voltage on bias level arising from data voltages is tackled as well.