Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories

Majid Jalili, H. Sarbazi-Azad
{"title":"Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories","authors":"Majid Jalili, H. Sarbazi-Azad","doi":"10.3850/9783981537079_0032","DOIUrl":null,"url":null,"abstract":"High static power consumption and insufficient scalability of the commonly used DRAM main memory technology appear to be tough challenges in upcoming years. Hence, adopting new technologies, i.e. non-volatile memories (NVMs), is a proper choice. NVMs tolerate a low number of write operations while having good scalability and low static power consumption. Due to the non-destructive nature of a read operation and the long latency of a write operation in NVMs, designers use read-before-write (RBW) mechanism to mask the unchanged bits during write operation in order to reduce bit flips. Based on this observation that some specific locations of blocks are responsible for the majority of bit flips, we extend the RBW to further reduce the number of bit flips per write in the memory system. The results taken from full-system simulations reveal that our proposal, called Captopril, can reduce the number of bit flips by 21% and 9%, on average, compared to the baseline and state-of-the-art designs, respectively.","PeriodicalId":311352,"journal":{"name":"2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.3850/9783981537079_0032","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25

Abstract

High static power consumption and insufficient scalability of the commonly used DRAM main memory technology appear to be tough challenges in upcoming years. Hence, adopting new technologies, i.e. non-volatile memories (NVMs), is a proper choice. NVMs tolerate a low number of write operations while having good scalability and low static power consumption. Due to the non-destructive nature of a read operation and the long latency of a write operation in NVMs, designers use read-before-write (RBW) mechanism to mask the unchanged bits during write operation in order to reduce bit flips. Based on this observation that some specific locations of blocks are responsible for the majority of bit flips, we extend the RBW to further reduce the number of bit flips per write in the memory system. The results taken from full-system simulations reveal that our proposal, called Captopril, can reduce the number of bit flips by 21% and 9%, on average, compared to the baseline and state-of-the-art designs, respectively.
卡托普利:减少非易失性主存储器中热位置的位翻转压力
目前常用的DRAM主存技术静态功耗高、可扩展性不足,将成为未来几年的严峻挑战。因此,采用新技术,即非易失性存储器(NVMs)是一个正确的选择。nvm允许少量的写操作,同时具有良好的可伸缩性和低静态功耗。由于nvm中读操作的非破坏性和写操作的长延迟,设计人员使用写前读(RBW)机制来掩盖写操作期间未改变的位,以减少位翻转。基于这一观察,即块的某些特定位置负责大多数位翻转,我们扩展了RBW,以进一步减少内存系统中每次写入的位翻转次数。全系统模拟的结果表明,与基线和最先进的设计相比,我们的方案(称为Captopril)可以将比特翻转次数平均减少21%和9%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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