First Demonstration of GaN Vertical Power FinFETs on Engineered Substrate

Abstract

GaN vertical power FinFETs are promising high voltage switches for the next generation of high-frequency power electronics applications. Thanks to a vertical fin channel, the device offers excellent electrostatic and threshold voltage control, eliminating the need for epitaxial regrowth 1 or p-type doping 2 unlike other vertical GaN power transistors. Vertical GaN FinFETs with 1200 V breakdown voltage (BV), 5 A current rating and excellent switching figure of merit have been demonstrated recently on free-standing GaN substrates 3 . Despite this promising performance, the commercialization of these devices has been limited by the high cost ($50-$100/cm 2 ) and small diameter (~ 2 inch) of free-standing GaN substrates. The use of GaN-on-Si wafers could reduce the substrate cost by ×1000, however the growth of the thick (~10 μm or thicker) drift layers required for kV class applications is extremely challenging on Si. Alternatively, GaN grown on engineered substrates (QST ® ) with a matched thermal expansion coefficient could enable low-cost vertical GaN FinFETs with thick (>10 μm) drift layers and large wafer diameters (8-12 inch). In this work, we demonstrate GaN power FinFETs on engineered substrates for the first time.