Implementation of DCT using variable iterations CORDIC algorithm on FPGA

Abstract

CORDIC or CO-ordinate Rotation Digital Computer is a fast, simple, coherent and powerful algorithm which is used for diversified Digital Signal Processing applications. In pursuance of speed and accuracy requirements of todays applications, we put forward variable iterations CORDIC algorithm. In this algorithm, to boost speed we can lessen number of iterations in CORDIC algorithm for specific accuracy. This enhances efficiency of conventional CORDIC algorithm which we have used to compute Discrete Cosine Transform for image processing. One Dimensional Discrete Cosine Transform is implemented by using only 6 CORDIC blocks which needs only 6 multipliers. Because of the simplicity in hardware speed of image processing on FPGA is raised. Further increase in speed can be achieved by concurrently processing number of macro-blocks of an image on FPGA.