A Stable 4th-Order Delta-Sigma Modulator with an FIR predictor

ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI:10.1109/ESSCIRC.1992.5468428

Toshiyuki Okanoto, Y. Maruyama, A. Yukawa

引用次数: 1

Abstract

A novel approach for a stable high-order delta-sigma modulator is presented. The modulator provides 16 bit resolution at 20kHz bandwidth using 4th-order noise shaping structure at an oversampling ratio of 64. The modulation loop is completely stabilized by an FIR prediction technique. The architecture inherently has less sensitivity to component mismatch. The total hardware is much the same as the noise shaping integrators.

查看原文本刊更多论文

带FIR预测器的稳定四阶δ - σ调制器

提出了一种稳定高阶δ - σ调制器的新方法。该调制器采用4阶噪声整形结构，过采样比为64，在20kHz带宽下提供16位分辨率。通过FIR预测技术实现了调制环的完全稳定。体系结构本身对组件不匹配的敏感性较低。总的硬件与噪声整形积分器大致相同。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

ESSCIRC '92: Eighteenth European Solid-State Circuits conference

自引率

0.00%

发文量