Performance Enhancement of Split Length Compensated Operational Amplifiers

Abstract

In this work, a technique to improve the performance parameters of the split length compensated operational amplifiers is proposed. The proposed technique uses an assistant amplifier for performance enhancement of the system. The assistant amplifier is designed in such a way that it draws only a small amount of power (<2%). This work is simulated in 180 nm CMOS technology with 1.8 V supply using Cadence Virtuoso. It achieves 78 dB DC gain, 40.8 MHz unity gain bandwidth and a slew rate of 27.17 V/uS for a load capacitance of 15 pF.