RF Performance of FOWLP to PCB Board Transition

Abstract

Fan-Out Wafer-Level-Packaging (FOWLP) to PCB transition enables the scaling of an antenna element into an array at a PCB level. This paper presents key design steps ensuring the FOWLP package-to-board transition structure's performance. The back-to-back package-to-board transition structure has a maximum simulated insertion loss of 0.88 dB and a minimum return loss of 11.73 dB over 20 to 35 GHz. A prototype was also fabricated for further characterization.