A CMOS Bandgap Reference with Reduced Offset Sensitivity

Abstract

A new circuit technique to realize a voltage reference in a CMOS process based on the bandgap reference principle is discussed. The reference voltage can be chosen freely as long as it is greater than or equal to the silicon bandgap voltage. The circuit combines a reduced sensitivity for MOS amplifier offset with a reduction of chip area occupied by resistors. The validity of the circuit technique has been demonstrated on silicon.