{"title":"Property Driven Test Generation in Absence of Direct Interface","authors":"B. Pal, P. Dasgupta, P. Chakrabarti","doi":"10.1109/INDCON.2006.302829","DOIUrl":null,"url":null,"abstract":"This paper presents an automatic test generation methodology for complex coverage points in the context of systems consisting of an environment (E), a machine (M) and a controller (C). The coverage points are modeled as temporal scenarios over a set of low-level events supported in M. These events can't be generated directly. There exists a set of high-level macros (supported in E) that can generate these events. The objective is to generate a sequence of macros to reach a complex coverage point in M. We present a prototype tool that automatically generates a systemverilog test-bench for the required macro sequence generation. The result on DLX pipeline shows the effectiveness of the approach","PeriodicalId":122715,"journal":{"name":"2006 Annual IEEE India Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 Annual IEEE India Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDCON.2006.302829","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents an automatic test generation methodology for complex coverage points in the context of systems consisting of an environment (E), a machine (M) and a controller (C). The coverage points are modeled as temporal scenarios over a set of low-level events supported in M. These events can't be generated directly. There exists a set of high-level macros (supported in E) that can generate these events. The objective is to generate a sequence of macros to reach a complex coverage point in M. We present a prototype tool that automatically generates a systemverilog test-bench for the required macro sequence generation. The result on DLX pipeline shows the effectiveness of the approach