Integration of polycide/metal capacitors in advanced device fabrication

A. Yin, J. White, A. Karroy, Chun Hu
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引用次数: 7

Abstract

Polycide/metal capacitors with high unit area capacitance and high linearity are successfully integrated into submicron CMOS device fabrication. The capacitor implementation is modular and low cost: the capacitor dielectric is deposited at low temperature and only one additional mask is needed for patterning the capacitor top plate. High voltage-capacitance linearity is obtained for the TEOS oxide capacitors of the capacitance density at 1 fF/spl mu/m/sup 2/, with the linear voltage coefficient of capacitance LVCC <5 ppm/V and the quadratic voltage coefficient of capacitance QVCC<2 ppm/V/sup 2/. For the nitride capacitors, 1.5 fF//spl mu/m/sup 2/ unit area capacitance is obtained with the LVCC <70 ppm/V and the QVCC <20 ppm/V/sup 2/.
多晶硅/金属电容器在先进器件制造中的集成
具有高单位面积电容和高线性度的多晶硅/金属电容器成功集成到亚微米CMOS器件制造中。电容器的实现是模块化和低成本的:电容器电介质在低温下沉积,并且只需要一个额外的掩模来对电容器顶板进行图案化。电容密度为1 fF/spl mu/m/sup 2/时的TEOS氧化物电容器获得了较高的电压-电容线性度,电容线性电压系数LVCC <5 ppm/V,二次电压系数QVCC<2 ppm/V/sup 2/。对于氮化电容器,在LVCC <70 ppm/V和QVCC <20 ppm/V/sup /时,获得1.5 fF//spl mu/m/sup / 2/单位面积电容。
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