{"title":"Input recoding for reducing power in distributed arithmetic","authors":"J. Sacha, M. J. Irwin","doi":"10.1109/SIPS.1998.715823","DOIUrl":null,"url":null,"abstract":"Digital signal processing algorithms rely heavily on the efficient computation of inner products. Distributed arithmetic provides a multiplication-free method for calculating inner products of fixed-point data, based on table lookups of precalculated partial products. A method is proposed for reducing switching activity, and hence power dissipation, in distributed arithmetic systems used for processing signed data. By performing a recoding of the two's complement inputs into a nonredundant signed-digit representation, the table lookups and accompanying accumulations corresponding to the sign extensions in the higher-order bit positions can be reduced.","PeriodicalId":151031,"journal":{"name":"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.1998.715823","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Digital signal processing algorithms rely heavily on the efficient computation of inner products. Distributed arithmetic provides a multiplication-free method for calculating inner products of fixed-point data, based on table lookups of precalculated partial products. A method is proposed for reducing switching activity, and hence power dissipation, in distributed arithmetic systems used for processing signed data. By performing a recoding of the two's complement inputs into a nonredundant signed-digit representation, the table lookups and accompanying accumulations corresponding to the sign extensions in the higher-order bit positions can be reduced.