Fabrication and Characterization of High-k Dielectrics Based Gate Stacks/MOS Capacitors for Advanced CMOS Devices

Abstract

This paper presents the fabrication and characterization of various sets of gate stacks: n-Si/SiO2/ALD-HfO2/Ti-Pt, n-Si/SiON/ALD-HfO2/Ti-Pt, n-Si/SiON/ALD-ZrO2/Ti-Pt and n-Si/SiON/ALD-ZrON/Ti-Pt under N2 and NH3 as annealing ambients. The XRD, AFM and FTIR characterizations have been performed for their structural and morphological studies; whereas the electrical characterization includes capacitance-voltage (C-V), conductance-voltage (G-V) and current-voltage (I-V) analysis. Electrical parameters such as dielectric constant (k), effective oxide thickness (EOT) and leakage current density (J) have been extracted through C-V, G-V and I-V measurements. The results suggest that SiON growth prior to HfO2, ZrO2 and ZrON deposition has the potential to surmount the problem of high leakage current density and interfacial traps due to sufficient amount of N2 incorporated at their interface. Electrical characterization such as C-V and I-V reveals the improved results for NH3 annealed ZrO2 sample relative to the all other samples in terms of suppressed gate leakage current, increased dielectric constant and reduced EOT.