{"title":"Reduction of hot carrier degradation in high voltage n-channel LDMOS BCD (Bipolar-CMOS-DMOS) technology","authors":"J. Hao, D. Hahn","doi":"10.1109/IIRW.2016.7904897","DOIUrl":null,"url":null,"abstract":"This paper reports two methods to reduce HC degradation in high voltage LNDMOS device without sacrificing the device breakdown voltage and Rdson in BCD technology. The first method modifies the front end process by forming a thick oxide in drift region-I. The process modification is achieved with a simple layout change in BCD technology. Experimental data shows this modification has significantly improved HC degradation in the LNDMOS. The second method modifies back end processes by adding a unique SiN barrier layer which we believe reduces plasma induced damage on the LNDMOS. We demonstrate the barrier layer can improve device hot carrier performance in the LNDMOS.","PeriodicalId":436183,"journal":{"name":"2016 IEEE International Integrated Reliability Workshop (IIRW)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Integrated Reliability Workshop (IIRW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IIRW.2016.7904897","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper reports two methods to reduce HC degradation in high voltage LNDMOS device without sacrificing the device breakdown voltage and Rdson in BCD technology. The first method modifies the front end process by forming a thick oxide in drift region-I. The process modification is achieved with a simple layout change in BCD technology. Experimental data shows this modification has significantly improved HC degradation in the LNDMOS. The second method modifies back end processes by adding a unique SiN barrier layer which we believe reduces plasma induced damage on the LNDMOS. We demonstrate the barrier layer can improve device hot carrier performance in the LNDMOS.