S. Samudrala, Charles Lo, John F. Brown, Richard E. Calcagni
{"title":"Design verification of a VLSI VAX microcomputer","authors":"S. Samudrala, Charles Lo, John F. Brown, Richard E. Calcagni","doi":"10.1145/800016.808214","DOIUrl":null,"url":null,"abstract":"Design verification as part of development provides an opportunity to correct design errors, improve performance characteristics, and optimize hardware. This paper presents the strategy and an overview of the verification performed in the development of a VLSI VAX microcomputer. Using a hierarchical methodology for simulation and verification, the logic design and circuit design have been verified.","PeriodicalId":447708,"journal":{"name":"MICRO 17","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1984-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 17","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/800016.808214","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Design verification as part of development provides an opportunity to correct design errors, improve performance characteristics, and optimize hardware. This paper presents the strategy and an overview of the verification performed in the development of a VLSI VAX microcomputer. Using a hierarchical methodology for simulation and verification, the logic design and circuit design have been verified.