F. Kawai, T. Onishi, T. Kamiya, H. Ishimabushi, H. Eguchi, K. Nakaharna, H. Aoki, K. Hamada
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引用次数: 25
Abstract
This paper presents a new multi-voltage SOI-BiCDMOS, which particularly focuses on "power MOSFET and BJT rich automotive applications". This technology can integrate Nch LDMOS and Pch LDMOS which have 35 V/60 V/80 V breakdown voltages, high packing density deep trench isolated BJTs, and a low cost 0.8 /spl mu/m CMOS, on a single chip. The six types of LDMOS can be simultaneously fabricated with only two additional masks to a CMOS process, and these LDMOSs satisfy both low specific on-resistance and good SOA. Furthermore, in this technology, a bonded SOI wafer with 200 mm diameter has been newly adopted in order to reduce chip cost.