FAAR: A router for field-programmable analog arrays

S. Ganesan, R. Vemuri
{"title":"FAAR: A router for field-programmable analog arrays","authors":"S. Ganesan, R. Vemuri","doi":"10.1109/ICVD.1999.745213","DOIUrl":null,"url":null,"abstract":"In this paper we address the routability and analog performance issues involved in routing for array-based FPAAs that have single-segment horizontal and vertical routing resources. We then present FAAR (field-programmable analog array router) and describe a routing algorithm developed for the target array-based FPAA architecture. Sequential routing technique is used for routing multi-terminal nets as well as multiple nets. Multi-terminal nets are broken into two-terminal pairs and routed. We use the notion of resource demand as a measure of the effect of a net-route on the routing of the other nets, while the number of programmable switches and the net-crossings are used as the metrics of interconnect parasitics. We present experiments to study the effect of various parameters such as the number of nets, terminals, CABs and I/O cells on the routing as well as the performance degradation. FAAR routes with high efficiency while keeping performance degradation small, and has considerably short execution times.","PeriodicalId":443373,"journal":{"name":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","volume":"202 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1999.745213","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

Abstract

In this paper we address the routability and analog performance issues involved in routing for array-based FPAAs that have single-segment horizontal and vertical routing resources. We then present FAAR (field-programmable analog array router) and describe a routing algorithm developed for the target array-based FPAA architecture. Sequential routing technique is used for routing multi-terminal nets as well as multiple nets. Multi-terminal nets are broken into two-terminal pairs and routed. We use the notion of resource demand as a measure of the effect of a net-route on the routing of the other nets, while the number of programmable switches and the net-crossings are used as the metrics of interconnect parasitics. We present experiments to study the effect of various parameters such as the number of nets, terminals, CABs and I/O cells on the routing as well as the performance degradation. FAAR routes with high efficiency while keeping performance degradation small, and has considerably short execution times.
用于现场可编程模拟阵列的路由器
在本文中,我们讨论了具有单段水平和垂直路由资源的基于阵列的FPAAs路由所涉及的可达性和模拟性能问题。然后,我们提出了FAAR(现场可编程模拟阵列路由器),并描述了为基于目标阵列的FPAA架构开发的路由算法。顺序路由技术用于路由多终端网和多网。多端网被分成双端对并路由。我们使用资源需求的概念来衡量网络路由对其他网络路由的影响,而可编程交换机的数量和网络交叉点被用作互连寄生的度量。我们通过实验研究了各种参数如网络、终端、cab和I/O单元的数量对路由的影响以及性能下降。FAAR路由效率高,同时保持性能下降小,并且执行时间相当短。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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