P. Poiré, Marc-André Cantin, Hervé Daniel, Y. Blaquière, Y. Savaria
{"title":"A comparative analysis of fuzzy ART neural network implementations: the advantages of reconfigurable computing","authors":"P. Poiré, Marc-André Cantin, Hervé Daniel, Y. Blaquière, Y. Savaria","doi":"10.1109/FPGA.1998.707927","DOIUrl":null,"url":null,"abstract":"The paper analyzes the performance differences found between software and hardware/sofware implementations of a reformulated fuzzy ART neural network algorithm. This reformulated algorithm is a solution for a real time radar signal clustering problem. The software implementations run on a 50 MHz TMS320C40 DSP, and the hardware/sofware implementation runs on the same DSP for its software part, whereas the FPGA based application specific hardware accelerator is realized on MiroTech's X-CIM TIM40 module. This investigation of FPGA based acceleration gave excellent results for our application: acceleration factors up to 68.9 have been reached.","PeriodicalId":309841,"journal":{"name":"Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPGA.1998.707927","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The paper analyzes the performance differences found between software and hardware/sofware implementations of a reformulated fuzzy ART neural network algorithm. This reformulated algorithm is a solution for a real time radar signal clustering problem. The software implementations run on a 50 MHz TMS320C40 DSP, and the hardware/sofware implementation runs on the same DSP for its software part, whereas the FPGA based application specific hardware accelerator is realized on MiroTech's X-CIM TIM40 module. This investigation of FPGA based acceleration gave excellent results for our application: acceleration factors up to 68.9 have been reached.