A Computing-in-Memory Cell Design based on LTPO Hybrid Thin Film Transistor Integration

Abstract

This paper presents a compute-in-memory (CIM) cell design based on the low-temperature polycrystalline-silicon (LTPS) oxide (LTPO) hybrid thin-film transistor (TFT) technology. The weight of the cell is quantized to 4 bits though 4 LTPS TFTs of different width-to-length ratios. The weights are able to be maintained for long-term operation with ultra-low leakage amorphous indium-gallium-zinc-oxide (a-IGZO) TFT switches. A CIM array is designed to implement a 3-layer MLP neural network for MNIST dataset recognition, which can achieve recognition accuracy of 98% even at a 5% relative threshold voltage fluctuation of the LTPS TFT.