A single-electron-transistor logic gate family and its application - Part I: basic components for binary, multiple-valued and mixed-mode logic

K. Degawa, T. Aoki, T. Higuchi, H. Inokawa, Yasuo Takahashi
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引用次数: 26

Abstract

This paper presents a model-based study of an SET (single-electron-transistor) logic gate family for synthesizing binary and MV (multiple-valued) logic circuits. The use of SETs combined with MOS transistors allows a compact realization of basic logic functions that exhibit periodic transfer characteristics. These basic SET logic gates are useful for implementing binary logic circuits, MV logic circuits and binary-MV-mixed logic circuits in a highly flexible manner. As an example, this paper describes the design of various parallel counters for carry-propagation-free arithmetic, where MV signals are effectively used to achieve higher functionality with lower hardware complexity.
单电子-晶体管逻辑门系列及其应用。第1部分:二进制、多值和混合模式逻辑的基本元件
本文提出了一种基于模型的用于合成二进制和多值逻辑电路的SET(单电子-晶体管)逻辑门系列。set与MOS晶体管结合使用,可以紧凑地实现具有周期性转移特性的基本逻辑功能。这些基本的SET逻辑门以高度灵活的方式用于实现二进制逻辑电路,中压逻辑电路和二进制-MV混合逻辑电路。作为一个例子,本文描述了用于无载波传播算法的各种并行计数器的设计,其中有效地利用MV信号以较低的硬件复杂度实现更高的功能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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