Study of fine pitch copper pillar solder joint on HDI flexible substrate for wearable devices

Abstract

In the trend of miniaturization, low cost, and high performance of electronic packages, high density flip chip interconnect has been required to interface with very fine pitch chips like signal processors and multiple thin dies package, this raise a great challenge to related interconnect technology in electronic packaging for high density, small feature size, and high performance. With technological development like flip-chip thermal compression bonding (TCB), interconnects have been reduced to considerable fine pitch, but traditional diffusion bonding method likes Au-Au and Au-Sn has a disadvantage of high cost and reduced throughput for multiple die package. Contrary to this Cu pillar solder reflow have been providing an excellent throughput at reasonably low cost, but they do have pitch limitations which is normally greater than 100 11m. This paper is targeted at resolving the challenges in conjunction with the advantages of Cu pillar reflow technologies and prepare a low cost solution for fabricating module which required for multiple die and fine pitch interconnects. Study was done on flexible substrate made of 25 μm PI tape with different layer count up to 4 metal layers. The Cu pillar bump pitch was kept at 80 11m with Cu pillar height of 10-13μm and solder cap of 12-15μm (very low profile for standard reflow). Variations in substrate surface finish, pad sizes, substrate flatness were investigated thoroughly. In final, the substrate flatness is identified to be the key contributor to prevent the open solders, and the OSP is found to be the most suitable candidate to ensure good solder joint integrity, this offers a great solutions for high volume production in Compass and provides an insight to designer for upcoming production of wearable devices.