2D and 3D TCAD simulation of III-V channel FETs at the end of scaling

Abstract

Quantum drift diffusion corrections and a simple ballistic mobility model are used to simulate IdVgs-characteristics of scaled 2D and 3D III-V channel FETs. The sub-threshold swing of double-gate ultra-thin-body geometries is extracted for different gate lengths, and the semi-classical results are compared with those from the quantum transport simulator QTx. The ballistic mobility recovers the QTx transfer curves of the gate-all-around nanowire FETs, except the on-currents in the linear regime. It is shown that source-to-drain tunneling sets a limit to scaling at a gate length of about 10 nm.