Narrow Device Issues in Deep-Submicron Technologies-the Influence of Stress, TED and Segregation on Device Performance

Abstract

Shallow Trench Isolation (STI) has been the isolation scheme of choice for sub0.25μm technologies. One of the challenges of scaling STI to 0.13μm and beyond is the control of Vt and Idsat of narrow devices. In this paper, we show that Idsat of narrow devices is strongly impacted by the stress due to trench processing. We also show that Vt and leakage of narrow devices (in particular NMOS devices) is impacted by dopant redistribution in the channel caused by TED (Transient Enhanced Diffusion) and boron segregation to the trench sidewalls.