A Pipelined Energy-efficient Hardware Accelaration for Deep Convolutional Neural Networks

Abstract

In this paper, a new architecture of an accelerator of a convolutional neural network is proposed. The suggested solution is pipelined and it reduces the band passing memory through the exploitation of sliding window images. Moreover, it is reconfigurable online at a convolution stride level. This proposal operates at a frequency equivalent to 280 mhz and offers a performance of 3.36 GMAC. The energy consumption is 475mw.