Defect engineering in SiGe heterostructures

Abstract

With the integration of heterostructures into the established silicon technology (a promising approach is the SiGe system) frequencies become attainable which used to be the exclusive domain of compound semiconductors. Heterostructures also make a reduction of the vertical device dimension possible. Therefore, they are well suited for advanced CMOS variants with lateral structures below 0.2 /spl mu/m for fast integrated circuits. To understand the influence of new deposition methods, process-induced defects, metal contamination, and mechanical stress are a major task for present-day defect engineering. SiGe heterostructures with ultra thin layers and ultra sharp junctions promise a novel generation of silicon devices. The growth of strained SiGe enables us to apply bandgap engineering to silicon-based devices (HBT, MODFET).