{"title":"Coupling noise analysis technique using random walks","authors":"H. Miwa, G. Suzuki","doi":"10.1109/ASICON.2009.5351315","DOIUrl":null,"url":null,"abstract":"Random walk method has recently been proposed in signal integrity analysis such as power grid noise analysis. This paper proposes techniques to apply random walk method to signal noise analysis for the data path circuit containing non-linear buffers and coupling capacitors. In order to fix output voltages and currents of non-linear buffer outputs, relaxation process is employed. To analyze coupling noise of both aggressors and victims, relaxation process is also introduced. The walk reward sharing technique improves computational efficiency by 6.2 times. In coupling noise analysis of example circuit, average voltage error of the coupling noise was 1.34% in 60 analysis timesteps and 50% delay error was 0.66% compared to SPICE. To analyze one timestep, average CPU time is 67 (ms) and the number of walks is 20,100 in 60 analysis timesteps.","PeriodicalId":446584,"journal":{"name":"2009 IEEE 8th International Conference on ASIC","volume":"89 11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE 8th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2009.5351315","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Random walk method has recently been proposed in signal integrity analysis such as power grid noise analysis. This paper proposes techniques to apply random walk method to signal noise analysis for the data path circuit containing non-linear buffers and coupling capacitors. In order to fix output voltages and currents of non-linear buffer outputs, relaxation process is employed. To analyze coupling noise of both aggressors and victims, relaxation process is also introduced. The walk reward sharing technique improves computational efficiency by 6.2 times. In coupling noise analysis of example circuit, average voltage error of the coupling noise was 1.34% in 60 analysis timesteps and 50% delay error was 0.66% compared to SPICE. To analyze one timestep, average CPU time is 67 (ms) and the number of walks is 20,100 in 60 analysis timesteps.