An Architecture for Extending the IEEE Standard 1149.1 Test Access Port to System Backplanes

Abstract

Tbts paper presents an arclcecrute for niakms the EEE Standard 1139.1 lest acces port did dl it? major provisions available on a system b~ckplaae It proposes a powerful. low-cost alternabve for system-wide comnim~ication for test and mamtenance purposes. using one chip-to-system test access protocol The bus interconnectton method employed in the xchtecture inherently accommcdates enipty slots in arbitrary posinom in the system back-plane without Qsrupnng the test bus connecavity or the test conimumcatlons