Charge confining mechanisms in III-V semiconductor nanowire

Abstract

III-V semiconductor nanowires exhibit unique features for application in novel optoelectronic devices. Due to their large surface-to-volume ratio, the realization of heterostructures beyond the capabilities of planar growth, that can still be integrated in Si-based electronics, becomes possible. Furthermore, polytypism was observed e.g. in GaAs nanowires such that different crystal phases coexist in the same nanowire. As different crystal phases have different electronic properties, this feature can be exploited to form crystal-phase heterostructures with atomically flat interfaces and only very small elastic deformation. We will discuss the specifics of electronic-structure simulations in such nanowires and present recent example studies.