A low-power 14-bit hybrid incremental sigma-delta/cyclic ADC for X-ray sensor array

Abstract

This paper presents a column-level 14-bit two-stage analog-to-digital converter (ADC) based on pseudo-differential operational amplifier, which is designed for the readout circuit of X-ray sensor array. This low-power hybrid ADC employs an incremental sigma-delta ADC and a cyclic ADC, achieving a good trade-off between accuracy and conversion speed. The two stages share the same analog circuit to reduce area and power consumption. A test chip is fabricated in 0.18μm CMOS technology. The hybrid ADC in each column is performed in parallel with power consumption of 218.813μW. The simulation result reveals the effective number of bits (ENOB) is 13.775 bits.