Complete Formal Verification of Multi Core Embedded Systems Using Bounded Model Checking

Abstract

Embedded systems are today frequently used in many applications. Modern designs show a rising complexity, partially including multiple CPU cores. The verification of such systems has to deal with parallel execution of programs and resource conflicts. In this paper we introduce an approach for the formal verification of multi core embedded systems. Bounded model checking is used as the underlying technique. It is shown how it can be applied to the verification of multi core systems ranging from the hardware up to the interaction of multiple cores on the software layer. The approach is demonstrated by the complete verification of a dual core RISC CPU