Thermal Resistance Formulation and Analysis of III-V FETs Based on DC Electrical Data

Abstract

This paper presents a unified framework for estimating the thermal resistance of a FET from DC drain current data. A mathematical derivation from physical principles is presented for a recently introduced practical expression for thermal resistance that is obtained from easily acquired DC data. Limitations of this expression are identified and circumvented by extending the formalism with a partial differential equation for temperature-dependent thermal resistance. This partial differential equation for thermal resistance is solved by numerical analysis of bias-dependent DC data versus temperature using the adjoint artificial neural network training procedure. Results applied to measured data from GaAs and GaN FET technologies demonstrate that the proposed method enables predictions (estimates) over a wide range of device operating conditions in bias and temperature.