{"title":"ASIC architectures for the 90s","authors":"J. Allen","doi":"10.1109/ISSCC.1987.1157164","DOIUrl":null,"url":null,"abstract":"Alternatives in Application Specific IC (ASIC), including MOS and bipolar arrays, standard cells, macro-cells, application specific compilers and wafer - scale integration will be compared. Applicable technology, design time, testability, performance, cost and development tools will be discussed from the point of view of the user, the vendor and the CAD tool designer.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Alternatives in Application Specific IC (ASIC), including MOS and bipolar arrays, standard cells, macro-cells, application specific compilers and wafer - scale integration will be compared. Applicable technology, design time, testability, performance, cost and development tools will be discussed from the point of view of the user, the vendor and the CAD tool designer.