Combining checkpointing and scrubbing in FPGA-based real-time systems

Abstract

SRAM-based FPGAs provide an attractive solution for building high-performance embedded computing systems. Fault tolerant mechanisms are usually implemented in FPGA-based critical systems to improve their vulnerability to transient faults. Most fault tolerant approaches proposed so far in the literature for FPGA systems utilize checkpointing and scrubbing techniques for the fault recovery and repair operations, respectively, and rely on redundancy-based fault detection solutions. In this paper, we study the feasibility of building a low-cost fault-tolerant approach for FPGA-based realtime systems that combines checkpointing and scrubbing, the latter for both fault detection and repair. We calculate the checkpoint frequencies that guarantee the execution of the tasks within their deadlines in the presence of transient faults, taking into consideration the scrubbing time of the FPGA processor. Furthermore, we propose a selective scrubbing approach to reduce the scrubbing time and make feasible the fault tolerant execution of tasks with tight deadlines. We demonstrate the proposed approach in a Leon-3-based SoC in a Virtex-5 FPGA.