Doing more with less: a recipe for rapid IDDQ development

Abstract

This paper describes the method for developing and deploying IDDQ testing on two 0.18 /spl mu/m chips developed at SMA. By using the self-scaling ratio-based IDDQ technique developed by Peter Maxwell, SMA is able to effectively screen defective devices without incurring unnecessary yield penalties. This paper documents the method of generating IDDQ vectors, qualifying them through temperature analysis, characterizing the devices setting the limits, and integrating the final product into the production test. As a case study, the results of this technique are discussed as they pertain to SMA's chips.