Hideyuki Ito, Ryusuke Konishi, H. Nakada, Hideyuki Tsuboi, Y. Okuyama, A. Nagoya
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引用次数: 18
Abstract
This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array to enable dynamic and autonomous reconfiguration of the logic circuit. The LSI was completed with successful introduction of two specific features: fully asynchronous logic circuits and homogeneous structure using only LUTs.