Dynamically reconfigurable logic LSI-PCA-1

Hideyuki Ito, Ryusuke Konishi, H. Nakada, Hideyuki Tsuboi, Y. Okuyama, A. Nagoya
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引用次数: 18

Abstract

This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array to enable dynamic and autonomous reconfiguration of the logic circuit. The LSI was completed with successful introduction of two specific features: fully asynchronous logic circuits and homogeneous structure using only LUTs.
动态可重构逻辑LSI-PCA-1
本文介绍了一种基于新型并行计算机结构的动态可重构逻辑大规模集成电路的实现。该架构的关键是其双结构单元阵列,使逻辑电路能够动态和自主地重新配置。该大规模集成电路成功地引入了两个特定的功能:完全异步逻辑电路和仅使用lut的同质结构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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