Design for degradation: CAD tools for managing transistor degradation mechanisms

Abstract

We present a set of computer-aided-design (CAD) tools to aid design of circuits in the presence of transistor degradation mechanisms. These CAD tools not only provide information on the circuit behavior due to degradation but also provide information on the degradation suffered by the individual components in the design and also provide design guidelines in the form of changes to the component parameters to bring down the degradation to specified values. These tools facilitate the designer during circuit design in the presence of degradation mechanisms like hot carrier injection (HCI) and negative bias temperature instability (NBTI).