A Novel Scheme to Map Convolutional Networks to Network-on-Chip with Computing-In-Memory Nodes

Abstract

Computing-In Memory (CIM) has been widely used to accelerate the inferencing speed of deep learning. Network-on-Chips (NoCs) are usually used together with CIM to enable the versatile ability of the hardware. This paper proposes a bandwidth aware mapping scheme to minimize both hops and bandwidth requirement. The simulation results show that the proposed scheme could reduce the hops and bandwidth requirements by more than 33.57% and 46.13%, respectively.