{"title":"Automated synthesis of standard cells using genetic algorithms","authors":"A. Bahuman, B. Bishop, K. Rasheed","doi":"10.1109/ISVLSI.2002.1016888","DOIUrl":null,"url":null,"abstract":"We have demonstrated the possibility of applying a genetic algorithm (GADO) to automate the design of a standard cell given only a behavioral description and optimization criteria such as power, area, speed or their combination. GADO maintains a population of potential standard cell designs. The designs are evaluated by (1) internal rules, (2) MAGIC for design rule checks and (3) SPICE for correctness of circuit behavior. Connections between transistors are encouraged by an influence check, which checks for broken connections and floating I/O nodes. Working inverters with arbitrary label placements are designed by evolution as a proof of concept.","PeriodicalId":177982,"journal":{"name":"Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2002.1016888","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
We have demonstrated the possibility of applying a genetic algorithm (GADO) to automate the design of a standard cell given only a behavioral description and optimization criteria such as power, area, speed or their combination. GADO maintains a population of potential standard cell designs. The designs are evaluated by (1) internal rules, (2) MAGIC for design rule checks and (3) SPICE for correctness of circuit behavior. Connections between transistors are encouraged by an influence check, which checks for broken connections and floating I/O nodes. Working inverters with arbitrary label placements are designed by evolution as a proof of concept.